D-Wave, the quantum company much of the field spent a decade writing off, just put a 99.9% two-qubit gate in the journal Nature. That is a genuinely big deal, and not a sentence anyone expected to type in 2026.
The paper, titled “An entangling gate for dual-rail erasure qubits” and published in early August, demonstrates a fast, high-fidelity two-qubit entangling gate on D-Wave’s superconducting dual-rail architecture. Quick jargon pass. A qubit is the quantum version of a bit. A two-qubit gate is the operation that entangles two of them, and it is where most quantum errors creep in, so getting it fast and clean is the whole game. Fidelity is just accuracy, how often the gate does what you asked. And dual-rail means each qubit is built from two physical elements so that the most common failure shows up as an obvious “erasure”, a flagged blank you can spot and discard, rather than a silent error that poisons your maths.
The numbers. D-Wave reported roughly 99.9% physical fidelity on the two-qubit operation with gate times around 500 nanoseconds, an erasure rate near 0.5% per gate, residual errors below 0.1% after post-selection, and bit-flips suppressed to the parts-per-million level. Those are measured results on hardware. The company also says its simulations suggest the dual-rail approach could cut the logical error rate by up to a factor of ten for each increment of error correction. Treat the factor-of-ten, and the talk of a 100-logical-qubit machine by 2032, as projections, because they are.
Why that matters. Today’s quantum machines are noisy. To get one logical qubit (a single qubit reliable enough to trust) you currently gang together many error-prone physical qubits and spend enormous overhead catching their mistakes. Anything that lowers that overhead moves fault tolerance, the point where a machine corrects errors faster than it makes them, from a slide deck to a lab bench. D-Wave’s roadmap now targets a 17-qubit system this year, a 49-qubit system in 2027 and a 181-qubit system in 2028, each promising steeper error suppression.
The angle: this is the annealing underdog crashing the fault-tolerance party. D-Wave built its name on quantum annealing, a narrower approach many academics sniffed at for years as not “real” quantum computing. This result is its play to be taken seriously on gate-model hardware, the general-purpose kind IBM, Google and IonQ have been racing on. One Nature paper does not win that race. But 99.9% with built-in erasure detection is a serious calling card, and it was peer-reviewed and reproducible, not teased in a press release with a stock chart bolted on.
The healthy scepticism. A two-qubit gate is not a computer. Scaling from a handful of qubits to the hundreds on the roadmap is exactly where quantum promises tend to die, and the projected error reductions are simulated, not yet built. Watch whether the 17-qubit DR17 system this year hits its numbers on real silicon. That is the test that counts.
Did you know: “erasure” qubits borrow their trick from telecoms, where an erasure channel sometimes drops a symbol but, crucially, tells you it dropped it. A known gap is far easier to fix than a hidden mistake.
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